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When dealing with ARM and RISC-V devices one constant I see is that distros or devs will make a specific image for a device. This image usually lacks a few things I am used to. On X86 the norm is to have an installer where I can make many choices such as whether to have full disk encryption, choose which DE I want, choose which device to install to (such as NVME) and choose my filesystem type. Does any distro do this for any RISC-V board ?

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cross-posted from: https://lemm.ee/post/36326370

Hey Everyone,

I'm very happy to see the engagement in my last post... Hoping to improve my communication skills and reduce my verbosity in the next couple of discussions.

I feel like it is due time to follow-up on what I posted on this board last year. That is, to follow through with "full-stack" hardware-software-application study groups.

If any of you still are interested, I'd like to open up this form for discussion of how that group should be run.

On the subject of HDLs (Hardware Description Languages), VHDL (Verilog HDL) could be fun for some of us to try together. Architecture is also a large concept frequently glossed-over, enciphered with too much jargon, or taught in a very "academic" fashion with very little discussion between students... The traditional classroom model, from what I experienced, is not too conducive to neurodivergent learning styles.

On that note, the RISC-V processor architecture could provide an amazing opportunity to gain a low-to-high understanding. Starting from the Silicon, where we delve into unit operations for chip manufacturing, fundamental solid state / condensed matter physics, and some mathematical models to describe the underlying phenomena. Then we will proceed to what can actually be configured in the ensemble of devices that constitute your "computer". What is a "piece of logic"? How do transistors actually operate? Why do certain design topologies make more sense than others...? And so forth.

We would conclude with some software projects like writing an I/O driver for a keyboard, or pool a fund together for some type of chip we design in EDA together. Overall, it sounds like a great idea for us all to increase our technology literacy, have a fun hobby group to hang out with, and to feel like you own every part of your computer.

On top of this, I feel that we should discuss FOSS tools with each other, as well as how they are best implemented to accomplish common tasks. I've punted the majority of my "Big Tech" stack to the curb the last 5-ish years.

TUI tools as well as CLI interaction is a paradigm of computer operation that I feel many of us have been sleeping on. It also has helped me understand how GUI applications can be better suited for the task at hand, versus when I should be using a terminal emulator to navigate the directory hierarchy instead. Many of you are more versed in programming than I am, so I would love to hear your thoughts.

We could even come up with a project for mobile, who knows? Not sure about the format, whether or not this would be synchronous, and the time commitment and sustainment of motivation throughout a probably 8 week period. However, I feel like a realistic solution for us all to get something meaningful out of an experience like this exists.

Any thoughts on how to get this up and going? What would we need to do on our first meeting together? What things would you want to learn in this course? It seems to me that many of us are already quite literate in sub-domains of what we are interested in. Maybe a teacher carousel routine could be adopted? Where we adopt a general "roadmap" curriculum, and, in an ad hoc fashion, assign people to be the instructor for the desired lesson? Then that person could go and create a slide deck in Beamer, or prepare a presentation with an overhead camera or digital drawing device to use as a teaching medium.

Those are just some ideas. Really looking forward to hearing what all of you think about this.

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We’re excited to share a preview of a Framework Laptop 13 Mainboard with a new CPU architecture today, and it’s probably not the one you think it is. The team at DeepComputing has built the first ever partner-developed Mainboard, and it uses a RISC-V processor! This is a huge milestone both for expanding the breadth of the Framework ecosystem and for making RISC-V more accessible than ever. We designed the Framework Laptop to enable deep flexibility and personalization, and now that extends all the way to processor architecture selection. DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week, and we’ll be sharing more as this program progresses.

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cross-posted from: https://lemmy.ml/post/17020181

Introducing a new RISC-V Mainboard from DeepComputing

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DeepComputing is preparing a RISC-V based motherboard to be used in existing Framework Laptop 13s!

Some snippets from the Framework blog post (the link to which is provided below):

The DeepComputing RISC-V Mainboard uses a JH7110 processor from StarFive which has four U74 RISC-V cores from SiFive.

This Mainboard is extremely compelling, but we want to be clear that in this generation, it is focused primarily on enabling developers, tinkerers, and hobbyists to start testing and creating on RISC-V.

DeepComputing is also working closely with the teams at Canonical and Red Hat to ensure Linux support is solid through Ubuntu and Fedora.

DeepComputing is demoing an early prototype of this Mainboard in a Framework Laptop 13 at the RISC-V Summit Europe next week.

Announcement: https://frame.work/blog/introducing-a-new-risc-v-mainboard-from-deepcomputing

The upcoming product page (no price/availability yet): https://frame.work/products/deep-computing-risc-v-mainboard

Edit: Adding link the the announcement by DeepComputing: https://deepcomputing.io/a-risc-v-world-first-independently-developed-risc-v-mainboard-for-a-framework-laptop-from-deepcomputing/

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Been studying RISC-V for... I think a year now. Bought the booklet outlining the ISA's modules, and have been working down from there.

I have seen various startups and actual products, as well as a bunch of simulators, but I haven't really seen any projects trying to design a RISC-V CPU from the ground up.

Are there any groups doing this? I don't think I'm at a point where I could meaningfully contribute, I'm mostly interested for educating myself.

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cross-posted from: https://lemmy.ml/post/15134844

Google pulls RISC-V support from generic Android kernel

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RISC-V

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RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).

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