this post was submitted on 22 Apr 2024
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RISC-V
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RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).
riscv.org
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This layer looks kinda dated and not maintained. Have you tried building meta-riscv? I have had success building a custom image for the visionfive 2 using the meta-riscv layer. (Same SOC as the pine64) I would start off with just the minimal core image. Not sure if you’re are looking for graphic support, I was only interested in a headless configuration.
I'm interested in a headless configuration too. I realise that CPU support might already have been mainlined, whilst GPU support is still pending.